© ROOT-NATION.com - Use of content is permitted with a backlink.
South Korea’s Samsung Corporation is getting closer to realizing its goal of creating a 1000-layer V-NAND architecture. The company has successfully developed a debut prototype with 900 layers, preparing for an intense competition with competitors.
Samsung is considered a pioneer in the field of semiconductor storage devices. Its V-NAND technology solutions are recognized as one of the most efficient on the global market. Back in 2024, the manufacturer intended to release 1000-layer NAND memory using innovative ferroelectric materials.
According to ETNews, the developers managed to create the first 900-layer V-NAND structure by implementing the Cell Multi-Bonding (CMB) method. This technology allows integrating two blocks of 450 layers into a single component. The development of such a volume of layers will provide a significant increase in the capacity of drives, in particular SSDs, which are actively used in all areas of the computer industry – from corporate and client systems to server equipment, desktop computers, laptops and mobile phones.
Representatives of the semiconductor sector reported that Samsung Electronics has recently designed an integrated 900-layer V-NAND system. For this purpose, the aforementioned CMB method was applied, which allows combining two 450-layer silicon wafers into one structure.
On the way to achieving the record, the engineers had to overcome several serious technical challenges, among which the key problem was the deformation of the wafers. This obstacle was eliminated by introducing a special design of the upper clamping chuck. In addition, with the help of alignment correction technologies, the developers eliminated errors associated with the displacement of elements.
At the current stage, SK Hynix holds the leading position in this race, having been the first to create and bring to market a 321-layer NAND architecture. Currently, they are already working on 400-layer solutions, where Samsung plans to use the vertical interconnect method, and its opponent SK Hynix – a hybrid interconnect.
At the same time, the Chinese manufacturer YMTC is also accelerating the implementation of its own plans in the NAND segment. This company is already producing devices with 294 and 232 layers, reducing the gap with foreign competitors such as Samsung, SK Hynix, and Micron. YMTC is investing heavily in the construction of new fabs, which will double its current silicon wafer production at a critical time when the market is experiencing a significant imbalance between supply and demand caused by the rapid development of the AI industry.
The method of layering to form structures of more than 900 levels is still in prototype status, but it defines the development vector for the future increase in storage capacity. The 1000-layer V-NAND architecture is scheduled to appear in 2030, while solutions with more than 400 layers are expected to enter production in the coming years.
Read also:
- Secret patent: Samsung has figured out how to reliably hide a flexible screen from scratches
- Testing the APV video codec on the Samsung Galaxy S26 Ultra: Why Was This Not Mentioned Earlier?